1. Field of the Invention
The present invention generally relates to a semiconductor device and a method of forming the same.
Priority is claimed on Japanese Patent Application No. 2010-178740, filed Aug. 9, 2010, the content of which is incorporated herein by reference.
2. Description of the Related Art
In a semiconductor device, for the purpose of repairing malfunctioning caused by problems in manufacturing, switching of circuit function, or the like, the circuit interconnection information is generally changed in the final manufacturing process, thereby causing the desired operation of the circuit.
For implementing this type of change in the circuit interconnectivity, a fuse is provided in the semiconductor device beforehand and the conductivity condition of the fuse is changed by inputting a particular signal from the outside of the semiconductor device, thereby causing the desired operation of the circuit. The fuse used to do this is known as an antifuse (or electrical fuse), which is non-conducting in its initial state and can be changed to the conducting state by responding to the input of a signal from outside.
Japanese Unexamined Patent Application, First Publication, No. JP-A-2009-290189 discloses that a fuse element having a structure generally the same as a MOS transistor is formed, and the conductivity state thereof is changed by the existence or non-existence of the destruction of an insulating film when forming the antifuse in a semiconductor device having the MOS transistor.
Japanese Unexamined Patent Application, First Publication, No. JP-A-2008-300623 discloses that development is being done with regard to semiconductor devices that use transistors formed as three-dimensional MOS transistor, in place of planar MOS transistors in the related art with advances in microfine transistors in recent years.